1. Field of the Invention
The present invention relates generally to the field of low-noise amplifiers. In particular, the present invention relates to the development of low-noise programmable gain amplifiers (PGAs) suitable for placement on integrated circuits (ICs) and for use in signal processing applications.
2. Related Art
PGAs are used in various analog signal processing applications where an electrical signal of varying amplitude must be either amplified or attenuated before subsequent signal processing. Various gain and/or attenuation settings are required to accommodate the wide dynamic range needed for the amplifier""s input stages. Numerous conventional techniques exist for meeting these demands.
What are needed, however, are techniques for providing attenuation in closed loop amplifiers without increasing their feedback factor. What is also needed is an approach to ensure suitable start-up conditions and avoid latchup, particularly in complimentary metal oxide semiconductor (CMOS) PGAs. Finally, a technique is needed to eliminate mismatched characteristics commonly found in passive elements across IC substrates due to process gradients.
The present invention includes a method and system for reducing impedance variations in an electrical circuit structured and arranged for placement on an integrated circuit (IC) substrate. The method includes forming sets of parallel connected resistors, each set corresponding to one of the impedance devices on the IC. Each set also includes two or more parallel resistor paths, each resistor path including two or more cascaded resistors and has a total impedance value substantially equal to the predetermined impedance value of its corresponding impedance device. Finally, the method includes configuring the sets of parallel resistor paths to form an interdigital structure across the substrate when the electrical circuit is placed on the IC.